Freescale Semiconductor /MK24F25612 /MCM /PLACR

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Interpret as PLACR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ARB 0 (00)SRAMUAP 0 (SRAMUWP)SRAMUWP 0 (00)SRAMLAP 0 (SRAMLWP)SRAMLWP

SRAMLAP=00, ARB=0, SRAMUAP=00

Description

Crossbar Switch (AXBS) Control Register

Fields

ARB

Arbitration select

0 (0): Fixed-priority arbitration for the crossbar masters

1 (1): Round-robin arbitration for the crossbar masters

SRAMUAP

SRAM_U Arbitration Priority

0 (00): Round robin

1 (01): Special round robin, favors SRAM backdoor accesses over the processor

2 (10): Fixed priority. Processor has highest, backdoor has lowest

3 (11): Fixed priority. Backdoor has highest, processor has lowest

SRAMUWP

SRAM_U Write Protect

SRAMLAP

SRAM_L Arbitration Priority

0 (00): Round robin

1 (01): Special round robin, favors SRAM backdoor accesses over the processor

2 (10): Fixed priority. Processor has highest, backdoor has lowest

3 (11): Fixed priority. Backdoor has highest, processor has lowest

SRAMLWP

SRAM_L Write Protect

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